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【SMAI】STAFF DATA SCIENTIST (Taoyuan/Taichung)
台灣美光- Guishan District, Taoyuan City
Apply here: https://careers.micron.com/careers/job/39083590?domain=micron.com&hl=en Join Micron as a Staff Data Scientist and spearhead the evolution of semiconductor development, manufacturing, and core business areas using advanced AI and machine learning approaches. This senior-level role is perfect for those eager to develop agentic AI systems, lead algorithm invention, and collaborate across functions to boost product engineering and manufacturing efficiency. We rely on your knowledge of machine learning, programming (mainly Python), and cloud platforms (GCP, Snowflake), supported by a Master’s or PhD in a relevant field. What You’ll Do • Design and implement cutting-edge algorithms and agentic AI systems. • Collaborate with cross-functional teams to optimize engineering and manufacturing processes. • Work with massive datasets (terabytes to petabytes) to uncover insights and enable automation. • Apply statistical modeling, feature engineering, and supervised/unsupervised/semi-supervised learning techniques. • Extract and cleanse data from diverse sources using SQL and other query languages. • Identify outliers, handle missing data, and ensure data integrity for robust modeling. What We’re Looking For • Education: Master’s or PhD in Data Science, Computer Science, or related field. • Technical Expertise: o Machine learning and advanced analytics o Python and/or PySpark o SQL databases (Snowflake preferred) o Familiarity with JavaScript, AngularJS 2.0, Tableau • Bonus Skills: o Exposure to semiconductor industry (preferred, not required) o Knowledge of Manufacturing Execution Systems (MES) • Strong communication skills and ability to work across teams. Why Join Us? You’ll be part of a team that’s shaping the future of semiconductor technology through AI-driven innovation. Your work will directly impact efficiency, quality, and scalability in one of the most advanced manufacturing environments in the world.
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[2026 R&D Alternate Service/Pre-employment] DV Design Verification Engineer (Hsinchu)
- 聯詠科技股份有限公司
- Zhubei City, Hsinchu County
[R&D Alternate Service/Pre-employment] DV Design Verification Engineer Job Responsibilities: 1. Build UVM verification TB 2. Use 3rd party VIP or implement in-house VIP and Test suite 3. Target for protocols like: USB, AMBA, PCIe, DisplayPort, HDMI, DRAM, etc. [R&D Alternate Service/Pre-employment] DV Design Verification Engineer Job Requirements: Master's degree or above in electronics, electrical engineering, telecommunications, electrical control, computer science, or related fields, with preference given to candidates who possess any of the following qualifications: 1. Experience in C++ or other OOP languages 2. Experience in Python or Perl script language [Co-creating A+ Novatek] Steady and reliable, expert spirit, creating advantages to drive technology, developing innovation, leading the future. Inviting outstanding talents to co-create A+ Novatek.
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Production Engineer - MPS _ J-00330949
- (ASML)台灣艾司摩爾科技股份有限公司
- Guishan District, Taoyuan City
Introduction to the job ASML competence center in Linkou (Taiwan) concentrates mature products knowledge in one place (> 450 engineers) for PAS5500, Special Applications & Mature Products, Yieldstar, Reticle Handler and GRC; established 2010 With 100 engineers for Mature Product Business Line: PAS5500, GRC and Service lab Combines knowledge and skills of Development & Engineering, Manufacturing and Customer Support in one engineering team. The center benefits from synergies with other Linkou activities. Role and responsibilities 1st & 2nd line troubleshooting, Escalations Material Notifications, Disturbance Notifications, Supply Deviation Notifications handling. Procedure writing/updates Cycle Time, Labor Hours maintenance/ reduction All aspects of Quality, Workmanship New Product introduction Engineering Change reviews and implementation for Sustaining and New Product Introduction New designs, design reviews. Production Routing/Sequence/Blueprints writing/updates Field Escalations, Analysis Lean Manufacturing, Statistical Process Control, Six Sigma Education and experience Education : Mechanical Engineering master degree 3~5 years design engineering experience Skills Is able to initiate and drive new procedures changes and/or projects Is able to think and act within general policies across department levels Shows responsibility for the results in his part of the competence or process Is able to use developed skills and technical concepts to find optimal solutions for specific problems in an innovative and creative way Has in-depth technical knowledge of competence: knows the effects of deviations within sub system/module on performance of the total system Is able to analyze and select the best solution for specific problems from all known possible solutions, in an innovative and creative way Is able to prevent technical disturbances from repeating by implementing learning from previous platform issues and enforcing R4V (Release for Volume) according PGP Figures out what needs to be done in specific, dynamic situations which happened before, using own professional judgment and dealing with complex situations Identifies gaps and drives solution, ensures processes are adapted to prevent (work) process errors from recurring Is able to set priorities based on an understanding of the (internal) customer's business regarding a competency and adjacent competencies Leadership and behavioral competencies and skills Teaches/educates and mentors less experienced colleagues Oversees less experienced colleagues, takes the lead of a small team and drives for the end results Is able to think outside standard processes, works independently Develops and maintains a network across several functional areas Is able to drive solutions for structural problems within a competency and adjacent options Deals with (internal) customers in tense situations Close Competencies and skills sub category Other information Production engineer, also known as manufacturing engineer, is the design, development, implementation, operation, maintenance, and control of all processes in the manufacture of a product. Within this context a 'product' is defined as an item that has value added to it during the production process. Value is added by means of processes such as forming, machining, joining, and assembly.be completed Inclusion and diversity ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that inclusion and diversity is a driving force in the success of our company. Need to know more about applying for a job at ASML? Read our frequently asked questions.
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[Digital Technology] Senior Agentic AI Engineer - Kaohsiung Office - R08
- 友達光電股份有限公司
- Qianzhen District, Kaohsiung City
AU Optronics' Kaohsiung Software Solutions R&D Center cordially invites you to join us as a key driver of next-generation AI technology! We are looking for a Senior Agentic AI Engineer to collaborate with our top AI team in building an enterprise-grade Agentic AI environment/platform, truly bringing the latest AI technologies to life. If you also wish to develop your career in Kaohsiung and stay abreast of the cutting-edge AI wave, please apply and contact us for further details! 【Job Responsibilities】 1. Enterprise-grade Agentic AI System Development and Optimization: Responsible for building and optimizing the core modules of the Agentic AI platform, including user context management, long and short-term memory management mechanisms, tool calling engine, and cross-module collaboration processes. 2. RAG and Knowledge Base Module R&D: Design and optimization of retrieval processes (chunking, embedding, retriever), including query rewrite, context construction, prompt engineering, and other technologies to improve cross-domain knowledge retrieval and response quality. 3. Agentic AI System Front-end and Back-end Integration and API Development: Participate in the implementation and optimization of platform back-end services and APIs (REST/SSE/WebSocket), and collaborate with the front-end (Vue/React) to complete the integration of the user-visualized agent development environment and platform. 4. LLM Question-Answering Result Evaluation Mechanism Design: Plan and establish an evaluation process for LLM answer quality, including automated test sets, indicator design (faithfulness, consistency, retrieval quality), model behavior monitoring, and iterative improvement mechanisms. 【Work Requirements】 1. Proficient in Python and JavaScript development, capable of independently completing medium-sized system modules. 2. Familiar with FastAPI or equivalent mainstream back-end frameworks, with experience in back-end API design and implementation. 3. Familiar with basic Docker operations, able to build and manage development/deployment environments. 4. Proficient in database operations (DBMS), familiar with basic SQL syntax; experience with ORM is a plus. 5. Familiar with at least one LLM/Agentic development framework (such as LangChain), and able to design basic Agentic Workflows. 6. Possesses systems thinking ability, capable of breaking down requirements into stable and maintainable engineering architectures. Experience with the following is particularly valuable: 1. Azure platform operation and CI/CD experience; 2. Familiarity with Azure AI Foundry, Azure Open AI, and Azure AI Search; 3. Multi-Agent system development experience; 4. Experience with LLM sensitivity tuning, prompt design, and tool calling error handling.
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CS - EUV Upgrade Install and Relocation Engineer (SAP) - Kaohsiung _ J-00330346
- (ASML)台灣艾司摩爾科技股份有限公司
- Zuoying District, Kaohsiung City
Context The Customer Support (CS) organization is responsible for the installations, qualification, repair and maintenance of the ASML systems at customer sites and is responsible for the necessary transfer of know-how to the customer. Local site Customer Support branches perform these tasks for the customer within the specific region. Executes system Upgrade & Installations and Relocations and provides technical support for other CS activities when needed. Conducts mostly well-defined tasks, with a higher degree of independency and under limited supervision. Requirements Requires flexibilty and openess to accommodate various work settings, locations and interactions/collaborations with different colleagues. Experienced UIR Engineer with BSc degree in relevant Technical Field (Electrical Technology, Mechatronics, Mechanical Engineering, etc.) or equivalent experience. Experienced in technical industry is required and/or semiconductor industry experience prefered. Experience in using computer applications, including data analysis tools, spreadsheet, and presentation software. Responsibilities Problem analysis and approachGather all information relevant for the problem, analyze using available means, gather additional diagnostic info if needed, decide on initial approach to solve problem and execute, consult with others. Problem handovers and routingHandover problem or problem aspects to others (2nd line support), document and package all data relevant for problem resolution (e.g. pass-downs, work orders, field service reports, system problem reports, technical reports). InstallationInstall equipment at customers locations, including equipment with new features, unload components, inspect for damage, assemble, align and test. UpgradeExecute hardware installation and perform system setup/recovery for upgrade packages as well as support locally owned field swaps by working according to an up-to-date plan and following the sequence. Provide feedback during execution in order to improve cycle time and performance. ProceduresBased on arranged customer machine time window to arrange for all (possible) parts, tools, equipment and information / knowledge to be available at start of procedure, execute procedure. Process OptimizationSignal gaps and improvement opportunities and reports it to the relevant stakeholders Training / adviceExplain appropriate actions to users to correct malfunctions, train customers in use and routine maintenance of equipment, recommend changes in user procedures when needed. Knowledge build-up and transferMaintain and broaden own knowledge, shares best known methods within the work group. CoachingProvide appropriate support and assistance to less experienced engineers on first tasks. This position requires access to controlled technology, as defined in the United States Export Administration Regulations (15 C.F.R. § 730, et seq.). Qualified candidates must be legally authorized to access such controlled technology prior to beginning work. Business demands may require ASML to proceed with candidates who are immediately eligible to access controlled technology. Inclusion and diversity ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that inclusion and diversity is a driving force in the success of our company. Need to know more about applying for a job at ASML? Read our frequently asked questions.
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[2026 R&D Alternate Service] IP Front End Engineer (Hsinchu)
- M31 Technology Corporation_円星科技股份有限公司
- Zhubei City, Hsinchu County
【Become a Member of Ensei】 Founded in 2011 by a group of professional and passionate partners, Ensei Technology is a rising star in the integrated circuit silicon intellectual property design service industry. Upholding the vision of "becoming the most trusted IP company in the semiconductor industry," we pursue sustainable operation and growth. We sincerely welcome you to become a member of Ensei, join us, and stand on the international stage! Let's work together to create value and pursue excellence with a culture of quality! 【Job Description】 The main business of M31 is licensing IP to IC design companies and wafer foundries. This position is a research and development alternative role for a Front-end Engineer responsible for the IP design process. 【Job Responsibilities】 1. Develop CAD utility for design automation: - Library characterization of SRAM/STD timing, power, and quality assurance. - SRAM compiler design, GDS tilling, netlist tilling. - Support RD to fix EDA issues. 2. Benchmarking and evaluation: - Work closely with a standard cell design team to optimize performance, power, and area. - Familiar with P&R tools (ICC/Innovus). 3. Experience in script programming: - Linux shell/TCL/Perl script. 【Requirements and Qualifications】 1. Master's degree or above in Electronics, Electrical Engineering, Telecommunications, Electrical Control, Computer Science, or related fields. 2. Proficient in: Various IC design automation tools; C, C++, TCL, CSH, Perl, and other programming languages. 3. Programming ability. 4. Applicants should attach: - Photo, resume, and personal statement; - Abstracts of papers (research topics, advisor's name, field of expertise, awards); - University and graduate school transcripts.
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[2026 R&D Alternate Service] IO R&D Engineer (Hsinchu)
- M31 Technology Corporation_円星科技股份有限公司
- Zhubei City, Hsinchu County
【Become a Member of Ensei】 Founded in 2011 by a group of professional and passionate partners, Ensei Technology is a rising star in the integrated circuit silicon intellectual property design service industry. Upholding the vision of "becoming the most trusted IP company in the semiconductor industry," we pursue sustainable operation and growth. We sincerely welcome you to become a member of Ensei, join us, and stand on the international stage! Let's work together to create value and pursue excellence with a culture of quality! 【Job Description】 The main business of M31 is licensing IP to IC design companies and wafer foundries. This position is a replacement position responsible for R&D related to IO circuit design. 【Responsibilities】 1. I/O circuit design 2. High-speed I/O circuit design 3. I/O/ESD/Latch-Up Design and Check 4. Basic/Advanced knowledge of PISI, ESD, and I/O 【Requirements and Qualifications】 1. Master's degree or above in Electronics, Electrical Engineering, Telecommunications, Electrical Control, Computer Science, or related fields. 2. Circuit simulation, ESD design and debugging. 3. Familiar with Virtuoso and Hspice. 4. Applicants should attach: - Photo, resume, and personal statement - Abstracts of papers (research topics, advisor's name, field of expertise, awards) - University and graduate school transcripts
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Chief Engineer of Process Development
- 瑞儀光電股份有限公司
- Qianzhen District, Kaohsiung City
1. Collect industry process technologies and theoretical research. 2. Study material properties and corresponding processes. 3. Plan process methods for new products. 4. Transform process technologies into production capabilities. 5. Evaluate and develop process equipment.
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CS - EUV F22 System Lead – Kaohsiung _ J-00330478
- (ASML)台灣艾司摩爾科技股份有限公司
- Zuoying District, Kaohsiung City
The role of the System lead is to independently plan, prep, verify, merge and execute service actions sequences into the most efficient and effective method/sequence. The role encompasses the preparation of the sequences collected from ARE and Coach databases. This person has a continuous improvement mindset and will communicate internally within the OPP team. Provide insights for the scheduling in relation to the sequences. They are in frequent communication with the central sequence integration team. Education and experience BS/MS major in Mechanical, Electrical/ Electro-optical, Controlling Engineering,/ Photonics, Physics or other related field Skills Good communication skill Basic English skill Cost awareness Logic think and well planning This position requires access to controlled technology, as defined in the United States Export Administration Regulations (15 C.F.R. § 730, et seq.). Qualified candidates must be legally authorized to access such controlled technology prior to beginning work. Business demands may require ASML to proceed with candidates who are immediately eligible to access controlled technology. Inclusion and diversity ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that inclusion and diversity is a driving force in the success of our company. Need to know more about applying for a job at ASML? Read our frequently asked questions.
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DRAM Bus and PDN Designer, up to Sr. Staff (3081816)
- Qualcomm Semiconductor Corporation_高通半導體有限公司
- Hsinchu City
【本職缺優先審核至高通官網投遞人選】 【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】 Apply here: https://careers.qualcomm.com/careers/job/446715508110 【Job Overview】 The Qualcomm Memory System/Technology Team in Process & Package Solutions Group has an opening in the areas of custom DRAM design and architecture for memory-centric compute systems for data center, mobile, compute, and XR. The candidate will design bus circuits and power distribution network for the custom DRAM to improve system KPIs such as bandwidth, latency, power, and thermal. The candidate will work on solutions of high-speed and high-bandwidth bus design for advanced memory. The candidate should have familiarity with the bus and compute fabrics as well as advanced packaging and 3D integration. This position offers the opportunity to work across multiple organizations such as process and packaging team, AI and compute architects, memory controller team, global SoC team, and emulation team. Providing timely feedback and updating architecture and design trade-offs to the team is essential. 【Responsibilities】 -Develop and optimize circuits for high-bandwidth memory bus and PDN control, timing, and control -Analyze and ensure the integrity of signals on the bus and PDN across PVT corners -Develop and validate the bus behavior for various access protocols to meet throughput, latency, and energy specifications -Develop novel fabrics for best/robust distribution of high-bandwidth busses and PDN across the DRAM array, compute, and IO -Create layouts that optimize the bus and PDN placement for routability across the whole chip -Use state-of-the-art design and simulation tools to simulate the bus behavior and manufacture readiness -Develop behavioral, timing, and power models of the bus to guide the architecture choices across AI, compute, and mobile workloads -Develop power modeling framework to build state-dependent power and determine PMIC requirements -Floorplan 3D DRAM chips under 3D integration manufacturing constraints, testability, repairability, and high performance
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