A participant with over five years of experience in BIM modeling and architectural design joined the adaptation program and continued to receive career counseling afterward. With tailored advice and support on resume writing, interviews, and workplace culture, they clarified their career direction and job search strategy. They eventually secured a position as a 3D modeling and fire protection planning engineer at a local engineering company.
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Senior Switch Hardware Design Engineer - Work Location: Hsinchu
優達科技股份有限公司
- 新竹縣竹北市
1. Ethernet Switch hardware design, debug, evaluation, and verification 2. Responsible for PCB material selection (SI/PI considered), schematics design, PCB layout constraint & review, HW DVT test and 2nd source verification...etc. 3. Writing and maintaining the hardware specification of the projects, failure analysis report if needed 4. Study tools & instruments for design & validation
Number of clicks: 1

AI HPC high-performance computing, high-speed digital interface, encryption/decryption hardware digital IC design engineer (I17)
聯詠科技股份有限公司
- 新竹市
[Product Line Description] Smart TV Solutions: Provide control chips for TVSoC, MEMC/FRC and panel-related display devices ASIC Solutions: Provide various ASICs for smartphones, smart TVs, e-sports screens, AI Server and other products (including CoWoS/ChipLet platform ) Solution [Job Description] Circuit Hardware Design and Development (The 104 job description is a reference for the department’s work content, and the detailed work arrangement is mainly based on the description during the interview) 1. CPU and peripheral circuit integration and development a. ARM-based : CA53, CA55, CA73, CA76, Neoverse CPU b. Coherent Mesh Network: CCI-500, CMN-700 c. CPU peripheral circuit: ADB-400, GIC-700, DAP, ETR d. AMBA protocol: AXI, ACE, CXL, CHI 2. High-speed digital interface IP design and development a. HDMI RX/TX link layer (HDMI1.4/2.0/2.1, eARC) b. DP RX link layer (DP1.4/2.0) c. e-DP TX link layer d. PCIe, CXL(compute Express Link) e. MIPI DSI/CSI RX/TX Device/Host controller f. Audio DSP: HiFi2, HiFi4 g. Vx1 display link layer h. 10M/100M/1G Ethernet MAC 3. Encryption and decryption algorithm circuit design and development, system security architecture design a. RSA, ECC, SM2 (non-symmetric algorithm) b. AES/TDES/SM4/CSA2/CSA3 (symmetric algorithm) c. SHA/HMAC/HKDF (hash - based function) d. Post-quantum cryptography (PQC) 4. High-speed IP FPGA/ VIP verification 5. Synopsys Zebu emulator: Verification architecture planning and integration 6. RTL to Netlist design process practice (Design Compiler, Spyglass, n-lint, CDC, PT STA) [Required conditions] (familiarity or relevant experience) 1. ARM-based CPU architecture integration and design development 2. High-speed audio and video transmission interface, digital circuit design and development 3. Familiar with encryption and decryption algorithms, digital circuit design and development 4. Familiar with verilog RTL coding, Design Compiler, PT STA, CDC 5. Familiar with FPGA implementation and verification process 6. Familiar with VIP/UVM verification environment
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Deputy Manager/Manager of Millimeter Wave RF Hardware R&D Technology_Xizhi_08046
緯創資通股份有限公司
- 新北市汐止區
1. Satellite phased array system/RF circuit (PA/Mixer/Filter/PLL) architecture planning, simulation, and design. 2. Component selection and performance evaluation. 3. PCB and component performance testing, verification, and debugging. 4. Familiar with millimeter-wave RF circuit layout. 5. Responsible for product mass production implementation.
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