A participant with over five years of experience in BIM modeling and architectural design joined the adaptation program and continued to receive career counseling afterward. With tailored advice and support on resume writing, interviews, and workplace culture, they clarified their career direction and job search strategy. They eventually secured a position as a 3D modeling and fire protection planning engineer at a local engineering company.
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Server Structure Project CAE Analysis Engineer/Leader/Assistant Manager_Neihu/Xizhi_00000
緯創資通股份有限公司
- 台北市內湖區
1. Perform structural analysis using CAE. 2. Apply solid mechanics knowledge and test data to conduct risk assessments, analyze root causes, and discuss countermeasures. 3. Conduct project discussions with domestic and international clients. 4. Develop new technologies and collect advanced technical data.
Number of clicks: 8

Senior Switch Hardware Design Engineer - Work Location: Hsinchu
優達科技股份有限公司
- 新竹縣竹北市
1. Ethernet Switch hardware design, debug, evaluation, and verification 2. Responsible for PCB material selection (SI/PI considered), schematics design, PCB layout constraint & review, HW DVT test and 2nd source verification...etc. 3. Writing and maintaining the hardware specification of the projects, failure analysis report if needed 4. Study tools & instruments for design & validation
Number of clicks: 1

Digital IC Design Engineer (S5)
聯詠科技股份有限公司
- 新竹市
[Product Line Description] Focus on the research and development of CMOS image sensor products for driving/security monitoring, smart home and edge AI machine vision systems. [Work Description] SoC IC design and development, integration verification, mass production planning, including: 1. Circuit design, architecture process development and verification of image processing. 2. Circuit design, architecture process development and verification of AI/NN deep learning. 3. Development and verification of IP/Controller. 4. Construct an FPGA verification platform. 5. Design process planning and practice (Synthesis/STA/LINT/CDC). 6. Cooperate with the APR Team to confirm the quality of Placement, CTS & STA sign-off. [Requirements] Applicants who meet one or more of the following: 1. Whole chip integration, STA timing analysis, and APR co-work experience. 2. Those with experience in SoC internal bus (AHB/AXI/APB) architecture planning and integration. 3. Those with practical design experience in algorithms such as image processing, color conversion and compression technology. 4. Those with practical design experience in MIPI C/DPHY, USB2/3.0, Vby1 and other controllers or related high-speed image transmission interfaces. 5. CV computer vision, AI/NN deep learning and other IP, with practical experience in IC design. 6. Those with experience in FPGA verification platform construction.
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